1. Field of the Invention
The present invention relates to a semiconductor device having a means for accelerating drive (or the invention belongs to the field of a semiconductor device).
2. Description of the Related Art
Most of control signals for a solid state imaging device (CMOS image sensor, CCD), a storage device (SRAM, DRAM, ROM, a flash memory, etc.), a programmable logic array (PLA) and so on are formed from a distributed parameter circuit, and the position of driving circuits is usually limited to the end of a control signal line because of its arrangement structure. Therefore, in the drive of the distributed parameter circuit, the difference in the delay time of the control signals is noticeable. Generally, the driving circuit has an address decoder part for addressing. The solid state imaging device often has a logic circuit which selects operation modes. As shown in FIG. 23, when loads 1015 of a distributed parameter circuit are driven by driving circuits 1020 and 1020 disposed at the both ends of the distributed parameter circuit, signal transmission is high speed, but it is necessary to dispose a decoder 1021 and a logic circuit 1022 at both ends, causing the necessity of a large area. Furthermore, the same signal line is wired at both ends, which leads to increases in the number of wirings and in power consumption. On the other hand, as shown in FIG. 24, when loads 1015 of a distributed parameter circuit is driven by a driving circuit 1020 from one side (for example, see JP-A-2003-143485 (Patent Reference 1)), the circuit area can be reduced greatly, but signal delay is noticeable in a load 1015 on the opposite side of the driving circuit 1020 connected, which leads to deteriorated circuit performance.